98 lines
3.0 KiB
C
98 lines
3.0 KiB
C
/*
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* Header file for save-restore functionality in driver
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*
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* Copyright (C) 2012, Broadcom Corporation
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* All Rights Reserved.
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*
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* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;
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* the contents of this file may not be disclosed to third parties, copied
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* or duplicated in any form, in whole or in part, without the prior
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* written permission of Broadcom Corporation.
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*
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* $Id: Exp $
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*/
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#ifndef _SAVERESTORE_H
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#define _SAVERESTORE_H
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/* WL_ENAB_RUNTIME_CHECK may be set based upon the #define below (for ROM builds). It may also
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* be defined via makefiles (e.g. ROM auto abandon unoptimized compiles).
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*/
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#if defined(BCMROMBUILD)
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#ifndef WL_ENAB_RUNTIME_CHECK
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#define WL_ENAB_RUNTIME_CHECK
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#endif
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#endif /* BCMROMBUILD */
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/* SAVERESTORE Support */
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#ifdef SAVERESTORE
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extern bool _sr;
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#if defined(WL_ENAB_RUNTIME_CHECK) || !defined(DONGLEBUILD)
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#define SR_ENAB() (_sr)
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#elif defined(SAVERESTORE_DISABLED)
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#define SR_ENAB() (0)
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#else
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#define SR_ENAB() (1)
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#endif
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#else
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#define SR_ENAB() (0)
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#endif /* SAVERESTORE */
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/* BANK size is calculated in the units of 32bit WORDS */
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#define SRCTL_BANK_SIZE(sr_cntrl) ((((sr_cntrl & 0x7F0) >> 4) + 1) << 8)
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#define SRCTL_BANK_NUM(sr_cntrl) (sr_cntrl & 0xF)
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#define SRCTL_EXP_MEM_SIZE(chipid) (chipid == BCM43239_CHIP_ID ? (24 << 8) : (48 << 8))
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#define SR_HOST 0
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#define SR_ENGINE 1
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#ifdef SAVERESTORE
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typedef enum {
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SR_HSIC_OOB_SHALLOW_WAKE_MODE = 0,
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SR_HSIC_OOB_SHALLOW_SLEEP_MODE
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} hsic_sr_module_t;
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bool hsic_sr_save(void *arg);
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#endif /* defined(SAVERESTORE) */
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extern CONST uint32 sr_source_code[];
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extern CONST uint sr_source_codesz;
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typedef bool (*sr_save_callback_t)(void* arg);
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typedef void (*sr_restore_callback_t)(void* arg);
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/* Function prototypes */
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void sr_download_firmware(si_t *si_h);
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int sr_engine_enable(si_t *si_h, bool oper, bool enable);
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int sr_pll_toggle(si_t *si_h, bool enable);
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int sr_update_srfast_dependency(si_t *sih, bool enable);
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uint32 sr_chipcontrol(si_t *si_h, uint32 mask, uint32 val);
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void sr_save_restore_init(si_t *si_h);
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uint32 sr_mem_access(si_t *sih, int op, uint32 addr, uint32 data);
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uint32 sr_register_save(si_t *sih, sr_save_callback_t cb, void *arg);
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uint32 sr_register_restore(si_t *sih, sr_restore_callback_t cb, void *arg);
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void sr_process_save(si_t *sih);
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void sr_process_restore(si_t *sih);
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int sr_gpio_oobwake(si_t *si_h, bool enable);
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int sr_uart_oobwake(si_t *si_h, bool enable);
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int sr_uart_oobwake_irq_ack(si_t *sih);
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void sr_wakeup_workaround(si_t *sih);
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uint32 sr_get_cur_minresmask(si_t *sih);
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#ifdef SAVERESTORE
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bool sr_cap(si_t *sih);
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bool sr_is_wakeup_from_deep_sleep(void);
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bool sr_is_wakeup_from_deep_sleep_bit28_check(void);
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void sr_wokeup_from_deep_sleep(bool state);
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void sr_force_deep_sleep_bit28_check(bool state);
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#else
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#define sr_cap(a) (FALSE)
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#define sr_is_wakeup_from_deep_sleep() (FALSE)
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#define sr_is_wakeup_from_deep_sleep_bit28_check() (FALSE)
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#define sr_wokeup_from_deep_sleep(state) (FALSE)
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#define sr_force_deep_sleep_bit28_check(state) (FALSE)
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#endif
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#endif /* _SAVERESTORE_H */
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